This file contains important last-minute information about Circuit Design Suite 11.0.2 for Windows, including installation issues, compatibility issues, bugs fixed, and changes from Circuit Design Suite 11.0. Refer to the NI Circuit Design Suite Release Notes for a complete list of new features in Circuit Design Suite 11.0.2 . You can access this document by selecting Help»Release Notes in Multisim or Ultiboard or navigating to Start»All Programs»National Instruments»Circuit Design Suite 11.0»Documentation»Release Notes.
Refer to the Getting Started with NI Circuit Design Suite manual for information about getting started with Circuit Design Suite. You can access this PDF from Start»All Programs»National Instruments»Circuit Design Suite 11.0»Documentation»Getting Started.
Circuit Design Suite 11.0.2 supports Windows Vista/XP 32-bit editions, Windows Vista 64-bit edition, Windows 7 32-bit and 64-bit editions, Windows Server 2003 R2 (32-bit) and Windows Server 2008 R2 (64-bit). Circuit Design Suite 11.0.2 does not support Windows NT/Me/98/95/2000, Windows XP x64, or the Windows Server non-R2 editions.
Circuit Design Suite 11.0.2 upgrades Circuit Design Suite 11.0. You cannot install Circuit Design Suite 11.0.2 side-by-side with version 11.0. You must reactivate Circuit Design Suite after you install it. It will not activate itself automatically.
You can install Circuit Design Suite without viewing any installation dialog boxes. Refer to the silent_install.txt file in the Supportfiles directory in the Circuit Design Suite distribution for more information about installing Circuit Design Suite silently.
National Instruments recommends that you regularly back up the files created within the Multisim and Ultiboard components of NI Circuit Design Suite. Additionally, you should back up internal files that store user-created data, such as database components. For more information about which files to backup and where to find them, refer to the Help.
Uninstalling Circuit Design Suite will not remove user data. For more information about the locations of user database and configuration files, refer to the Archiving Data Help topic.
The following is a subset of the issues fixed between Circuit Design Suite 11.0 and Circuit Design Suite 11.0.1
| Multisim ( 112 ) |
| Bug ID | Description |
| 108322 | Cannot click finish in MCU wizard if the project type is load external hex file. |
| 109518 | Two layers can improperly end up with the same layer name in some cases. |
| 111245 | The pin mapping for the VGM96VC is incomplete. |
| 111336 | Undo and Redo menu items are not translated in the Symbol Editor / Title Block Editor. |
| 111614 | Convergence Assistant doesn't use LabVIEW or ELVIS instruments. |
| 112376 | Printing an instrument over a wireless network takes a long time in some cases. |
| 112563 | Word generator properties window resizes itself when changing display format. |
| 112599 | Rated LEDs have unrealistic parameters. |
| 113343 | The Temperature parameter in the resistor property pages does not validate out-of-range values correctly in some cases. |
| 113500 | Agilent function generator does not model 50 ohm output impedence correctly. |
| 113509 | Agilent oscilloscope vertical zoom can go up to 1nV/div. |
| 114056 | Goto location generated by confirming virtual connection is static. |
| 114477 | Footprint mapping for ADG413BRZ is incorrect. |
| 114874 | spreadsheet results tab go to arrows are out of sync with the circuit after a replace by HB operation. |
| 114972 | The shortcut key Ctrl-F does not open the find dialog window in the Description box editor. |
| 115056 | Analysis dialog should not allow selecting duplicate device/model parameters. |
| 115143 | Labview intrument Signal Analyzer is not saving Interpolation Method. |
| 115148 | Labview Microphone doesn't save or copy its Sample Rate setting. |
| 115833 | Schematic does not refresh correctly after closing the symbol/title block editor. |
| 115869 | Moving a group of components where no autowire is needed still causes autowiring. |
| 115936 | Multisim allows renaming components when the schematic is read only. |
| 115938 | Nets can be renamed if the read-only property is set on the schematic. |
| 115942 | Disabling Instruments toolbar in Circuit Restrictions prevents components from being placed from In-use list. |
| 115960 | MOSFET DEFAS instance parameter not saved. |
| 115985 | GRAPH_LCD* Display components are almost impossible to read given the color choices. |
| 116077 | Refdes with underscores truncated after cut and paste. |
| 116222 | PWL source does not generate error if external file does not exist. |
| 116241 | Deleting a model from the User database eventually causes error in "Edit Model" dialog. |
| 116247 | Integration method is being translated before passed to simulator. |
| 116277 | Lock Subsheets option disables Copy and Cut tasks. |
| 116336 | Forward annotating does not remove unused component after change to multisection component. |
| 116395 | Bus IO and offpage connectors do not stay connected to bus after rotating. |
| 116422 | Oscilloscope Trigger Type Buttons names are truncated. |
| 116486 | Connecting a component to pins in Ultiboard will not correctly backannotate when it is in a hierarchical block. |
| 116517 | The function generator instrument does not respect setting changes made during simulation when connected in certain configurations. |
| 116520 | Function generator LabVIEW instrument repeat button is broken. |
| 116539 | Instance footprint mapping does not update schematic. |
| 116559 | Physical constants return zero for analyses. |
| 116587 | Moving component in Database Manager changes component name. |
| 116625 | Disabling the NI ELVISmx Arbitrary Waveform Generator output signal while simulating will crash multisim. |
| 116631 | Connector name should be allowed to be the same as another component. |
| 116634 | dBm Measurement in the Spectrum Analyzer is incorrect. |
| 116637 | Naming an on-page connector with the same name a component had when placed can mess up the reference descriptor. |
| 116671 | Netlist report doesn't display the sections of multisection components. |
| 116675 | Changing net on hidden pin connection through spreadsheet causes prompt to rename all things on the net. |
| 116690 | Find information can yield incorrect behaviour after deleting and placing components. |
| 116693 | Cannot set hidden pin connections in spreadsheet. |
| 116695 | Hidden pins become out of sync using the gate optimizer. |
| 116696 | OPC connector names on multi-page not being updated. |
| 116712 | Importing a ms10 circuit containing multi-section component does not work correctly in some cases. |
| 116716 | Simulation settings not being imported correctly if set to disabled. |
| 116718 | Undoing with subcircuits does not work as expected. |
| 116724 | Connecting a net with an existing onpage to a hidden pin will create a floating on-page connector and will not actually connect to the hidden pin. |
| 116726 | Overwriting common hierarchical block on save when upgrading schematic crashes Multisim. |
| 116768 | Search Fails In the Component Browser When Used From the Component Wizard. |
| 116771 | Replace By Subcircuit Creates Unnecessary I/O Pins. |
| 116776 | 74LS11D IC has an error in symbol model mapping. |
| 116779 | RefDes drops leading zeroes. |
| 116801 | There is no prompt to save changes when exiting the Description box edit view. |
| 116805 | Multiple sections of a multi-section component can have inconsistent refdes.. |
| 116806 | Different sections of a single component can be mistaken for two components by BOM. |
| 116807 | Component properties are not synchronized properly when sections have different cases for refdes. |
| 116837 | RefDes change is not backannotated if component is not present in any of the component databases. |
| 116845 | Dragging selection disconnects bus wires. |
| 116846 | Colour of nets in a locked schematic can still be modified. |
| 116856 | The ~ symbol leading a net name causes the SPICE parser to fail. |
| 116867 | Undo of any action on main design messes up refdeses of components inside subcircuit. |
| 116873 | Hidden pin information gets wiped out after a refdes rename. |
| 116877 | The controlled one shot negative edge trigger is broken. |
| 116881 | Multisim crashes when deleting and editing a component in some cases. |
| 116901 | Refdeses inside a subcircuit will reset when a part is removed that has a refdes partially matching the subcircuit's refdes. |
| 116911 | Renaming multisection component RefDes to lower case can crash Multisim in some cases. |
| 116917 | Refdes R1A in subcircuit gets renamed to R1A1 after undo action in top level design. |
| 116920 | Connect pin to net difference getting lost after un-pair then re-pair of net in back annotation dialog. |
| 116928 | Flipping a voltmeter or ammeter horizontally crashes when only one pin is connected. |
| 116939 | Multisim crashes when you perform overlapping place actions via keyboard. |
| 116957 | Back Annotation crashes Multisim in some cases after Rename/Renumber Components has been used. |
| 116959 | Selection is kept after bus lines are deleted from the Bus Settings dialog. |
| 116995 | Unable to change the sheet size of NI Elvis II Design. |
| 117003 | Copy and paste of nested subcircuits inserts invalid refdes into refdes manager. |
| 117007 | Power Factor reading from the watt meter is incorrect in some cases. |
| 117016 | Possible application crash in some cases displaying the Database Manager. |
| 117036 | ERC check is flagging NC pins as warning for unconnected pins. |
| 117054 | Undoing a delete trace action in the grapher can crash Multisim. |
| 117065 | Changing a setting in the function generator instrument during simulation inverts the duty cycle percentage. |
| 117075 | RefDes Visibility setting is ignored for power source components. |
| 117083 | Edited model is not refreshed if component properties dialog is not closed. |
| 117086 | Warning message always been prompted even if AWG and Fgen instruments are not selected to be active. |
| 117091 | Search does not work if item is previously entered in component field. |
| 117093 | Hovering over an unselected design can incorrectly return focus on an instrument property dialog. |
| 117098 | PLD HBs break the net link when used within another PLD Schematic. |
| 117099 | Simulation crashes if you change the state of the D pins while the simulation is running. |
| 117111 | Possible application crash while simulating in some cases using certain instruments. |
| 117193 | Changing visibility settings for labels using design toolbox does not mark file as dirty.. |
| 117201 | AC plots from Monte-Carlo and Worst-Case mis-label the axies. |
| 117257 | Hiding RefDes using sheet properties in a SC/HB removes the hierarchical connection information. |
| 117272 | Nets through probes fail if the wires overlap in some cases. |
| 117273 | Printing a PLD design crashes Multisim in some cases. |
| 117274 | Component renumber does not respects page ordering. |
| 117336 | Multi-page schematics should print in the order which they appear in the Design Toolbox. |
| 117379 | Copy and paste of line loses grid snap. |
| 117392 | Creating a new PLD will allow creating a PLD with an invalid name if the name ends with \. |
| 117410 | Reordering the sheets doesn't change the sheet numbers in title blocks. |
| 117586 | ADA4841-1YRZ causes an internal simulation error. |
| 117610 | Clicking cancel on the Variant Manager can crash Multisim in some cases. |
| 117635 | The models for 74LS393N and 74LS393D are incorrect. |
| 117666 | Performing Worst case analysis can crash Multisim in some cases. |
| 117880 | ENERGIZING_COIL Is Not Energizing the NC_CONTACT and NO_CONTACT. |
| 117534 | Title Block Title Field Resets to File Name After Undo. |
| 117838 | Changing the net color using the Net properties dialog temporarily shows a blank color box. |
| 117901 | X is not placed on common pin of multisection component that is connected to a net after running a gate optimize operation. |
| 117790 | Digital_Frequency_Divider causes netlist error. |
| Ultiboard ( 53 ) |
| 115709 | Importing an Orcad max file will make the component refdes a part of the footprint's name. |
| 116445 | Gate optimizer does not work for components with custom section names. |
| 112465 | Trace width are different in Ultiboard Nets Spreadsheet and Net Edit dialog. |
| 112691 | Copying and pasting a pad into the 'Custom Pad shape edit mode' does not allow you to save the shape. |
| 114327 | Deleting Open Trace Ends Causes Ultiboard to Hang in some cases. |
| 114366 | Ultiboard does not refresh preview box if selection is made in the spreadsheet view using keyboard. |
| 114375 | Gerber doesn't export the pad copper ring correctly. |
| 114545 | Clicking on Lock button toggles locked status in multiple selection situation. |
| 114582 | Locked button status does not reflect selection for Parts tab. |
| 114608 | Duplicate D-codes permitted when entering values through keyboard. |
| 114618 | Circles with a wide thickness are expanded in the Gerber file. |
| 114875 | Removing a net from a net group will revert Max via count to 2147483647. |
| 115058 | It is possible to enter invalid clearances in the group editor. |
| 115060 | Group editor component spacing values are not validated. |
| 115100 | Aperture mapping list should be sortable. |
| 115174 | Dialog should check for valid values when assinging D-Codes. |
| 115275 | Pin layer properties are not preserved when component changes board side. |
| 115321 | SVG doesn't export the pad copper ring correctly - layer settings are ignored. |
| 115370 | Part spacing DRC error indicator can be misleading sometimes. |
| 115476 | Ultiboard allows for duplicate category names in its database tree. |
| 115670 | Closing an unsaved design will close immediately and then prompt to save. |
| 115671 | Bus group drc message is cryptic. |
| 115674 | DRC errors appear inconsistently for overlapping parts. |
| 115687 | Pin and gate swapping should not use use group settings if the part is not in a group. |
| 115691 | Right clicking on checkbox for visibility shows context menu for wrong layer. |
| 115719 | Ruler bars disappear after exiting from full screen mode. |
| 115737 | Dialog box title keeps counting up after placing board outline with multiple connectors. |
| 115948 | Ultiboard crashes when opening the 3D View in some cases. |
| 116373 | Imported OrCAD File does not have Silkscreen Information. |
| 116374 | When connecting traces to vias the Assume Net field is empty in some cases. |
| 116532 | Changes made to text objects after Apply button is used doesn't get made. |
| 116549 | Changing RefDes for multi-section components in MS after a gate swap in UB does not properly update net connections. |
| 116667 | Crash exporting to NC drill while doing in-place part edit. |
| 116750 | Crash showing properties of a via placed in a CAD design. |
| 116824 | Ultiboard does not respond when moving a component attached to overlapping vias. |
| 116857 | Selection filters not correctly saved in Ultiboard. |
| 116874 | Thermal relief settings for copper areas are inverted. |
| 116896 | False positive when you separate out net and footprint change. |
| 116910 | Placing a hole causes the DXF export to generate a large file. |
| 116929 | Reference point on land patterns changes when being edited. |
| 116933 | TRIKO301812 has silkscreen overlapping pad. |
| 116944 | Editing a custom pad while placing a part crashes Ultiboard. |
| 116966 | Ultiboard can become unresponsive while trying to open certain designs. |
| 117002 | Parts without silkscreen are impervious to part shoving. |
| 117033 | Ultiboard crashes when closing an open design in some cases. |
| 117067 | Silkscreen text not selectable if copper top is grayed out. |
| 117100 | Voiding is not being performed between copper area connected to net and copper area not connected to net. |
| 117173 | Enter Coordinate dialog crashes when it looses focus and user clicks OK. |
| 117453 | Invoking board wizard after placing a test point crashes Ultiboard. |
| 117467 | Multisim and Ultiboard does not asks to Save work before closing when shutting down the computer. |
| 117479 | Wrong part is set for delete when forward annotating in some cases. |
| 117560 | Forward annotating an UltiCap file can crash Ultiboard in some cases. |
| 117719 | Back annotation wiring fails after manual pairing two resistors. |
The following is a subset of the issues fixed between Circuit Design Suite 11.0.1 and Circuit Design Suite 11.0.2
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发表于 2021-3-13 00:00:44
